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Displaying records 51 through 60 of 460 |
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Price: $150.00
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Sale: $125.49
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Mika M. Nystrom::Alain Martin
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 2002-05-31
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Reading Level: 232
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Description: Comprehensive analysis of a newly developed asynchronous family. Covers circuit theory, practical circuits, design tools and an example of the simple asynchronous microprocessor using the circuit family.
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Price: $135.00
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Sale: $135.00
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Manufacturer: Prentice Hall
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Number of Items: 1
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Binding: Hardcover
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Author: James D. Plummer::Michael Deal::Peter D. Griffin
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Publisher: Prentice Hall
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Edition: 2
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Dewey Decimal Number: 621
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Publication Date: 2008-11-11
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Reading Level: 817
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Description: For one-quarter/semester, senior/graduate level courses in Fabrication Processes. Unique in approach, this text provides an integrated view of silicon technology--with an emphasis on modern computer simulation. It describes not only the manufacturing practice associated with the technologies used in silicon chip fabrication, but also the underlying scientific basis for those technologies.
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Price: $185.00
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Sale: $57.49
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Emad N. Farag::Mohamed I. Elmasry
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Publisher: Springer
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Edition: 1st
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Dewey Decimal Number: 621.395
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Publication Date: 1999-10-01
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Reading Level: 352
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Description: The wireless revolution has come upon us swiftly and powerfully. Today one of the most challenging areas for VLSI designers is VLSI circuit and system design for wireless applications. The design of a cellular radio system involves several engineering disciplines ranging from communication theory and digital signal processing to high frequency semiconductor technology and circuit design. Furthermore, the new generation of wireless systems, which includes multimedia, puts severe constraints on performance, cost, size, power and energy. VLSI designers now need to understand both wireless communication and mixed signal design. Mixed Signal VLSI Wireless Design: Circuits and Systems provides the designer with an overview of wireless communication systems, followed by a detailed treatment of related topics such as the mobile radio, digital modulation and schemes, spread spectrum and receiver architectures. The second half of the book deals with VLSI design issues related to mixed-signal design. These include analog-to-digital conversion, transceiver design, digital low-power techniques, amplifier design, phase-locked loops and frequency synthesizers. Mixed Signal VLSI Wireless Design: Circuits and Systems is written for use in advanced level courses and also serves as a basic reference for professional engineers.
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Price: $198.00
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Sale: $164.95
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Manufacturer: Wiley-Interscience
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Number of Items: 1
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Binding: Hardcover
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Author: Paul H. Bardell::W. H. McAnney::J. Savir
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Publisher: Wiley-Interscience
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Dewey Decimal Number: 621.38173
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Publication Date: 1987-10
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Reading Level: 368
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Description: This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
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Price: $163.00
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Sale: $134.50
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Naresh Maheshwari::S. Sapatnekar
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Publisher: Springer
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Edition: 1st
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Dewey Decimal Number: 621.395
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Publication Date: 1998-10-31
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Reading Level: 208
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Description: Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems. Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques is described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits covers the following topics: - Algorithms for sequential timing analysis - Fast algorithms for clock skew optimization and their applications - Efficient techniques for retiming large sequential circuits - Coupling sequential and combinational optimizations. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design.
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Price: $219.00
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Sale: $153.30
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Franco Maloberti
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 2001-10-31
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Reading Level: 388
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Description: Analog Design for CMOS VLSI Systems is a comprehensive text that offers a detailed study of the background principles and the analog design techniques for CMOS-VLSI implementation. The book covers the physical operation and the modelling of MOS transistors. Discusses the key features of integrated passive components and studies basic building blocks and voltage and current references before considering in great details the design of op-amps and comparators. The book is primarily intended for use as a graduate-level textbook and for practising engineers. It is expected that the reader should be familiar with the concepts taught in basic introductory courses in analog circuits. Relying on that proper background knowledge the book presents the material on an intuitive basis with a minimum use of mathematical quantitative analysis. Therefore, the insight induced by the book will favour that kind of knowledge gathering required for the design of high-performance analog circuits. The book favours this important process with a number of inserts providing hints or advises on key features of the topic studied. An interesting peculiarity of the book is the use of numbers. The equations describing the circuit operation are guidelines for the designer. It is important to assess performances in a quantitative way. To achieve this target the book provides a number of examples on computer simulations using Spice. Moreover, in order to acquire the feeling of the technological progress, three different hypothetical technologies are addressed and used. Detailed examples and the many problems make Analog Design for CMOS VLSI Systems a comprehensive textbook for a graduate-level course on analog circuit design. Moreover, the book will efficiently serve the practical needs of a wide range of circuit design and system design engineers.
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Manufacturer: Addison Wesley Publishing Company
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Number of Items: 1
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Binding: Hardcover
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Author: Carver Mead
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Publisher: Addison Wesley Publishing Company
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Edition: 1st
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Dewey Decimal Number: 621.395
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Publication Date: 1989-01-01
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Reading Level: 371
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Description: The first book to take VLSI into the analog domain and apply it to biology. It provides solid tools for research in artificial intelligence and neurobiology while illustrating powerful new applications for analog systems.
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Price: $189.00
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Sale: $151.00
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Kerry Bernstein::K.M. Carrig::Christopher M. Durham::Patrick R. Hansen::David Hogenmiller::Edward J. Nowak::Norman J. Rohrer
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Publisher: Springer
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Edition: 1st
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Dewey Decimal Number: 621.38152
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Publication Date: 1998-08-31
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Reading Level: 376
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Description: High Speed CMOS Design Styles is written for the graduate-level student or practicing engineer who is primarily interested in circuit design. It is intended to provide practical reference, or `horse-sense', to mechanisms typically described with a more academic slant. This book is organized so that it can be used as a textbook or as a reference book. High Speed CMOS Design Styles provides a survey of design styles in use in industry, specifically in the high speed microprocessor design community. Logic circuit structures, I/O and interface, clocking, and timing schemes are reviewed and described. Characteristics, sensitivities and idiosyncrasies of each are highlighted. High Speed CMOS Design Styles also pulls together and explains contributors to performance variability that are associated with process, applications conditions and design. Rules of thumb and practical references are offered. Each of the general circuit families is then analyzed for its sensitivity and response to this variability. High Speed CMOS Design Styles is an excellent source of ideas and a compilation of observations that highlight how different approaches trade off critical parameters in design and process space.
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Manufacturer: Materials Research Society
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Binding: Hardcover
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Publisher: Materials Research Society
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Dewey Decimal Number: 621.395
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Publication Date: 1987-12
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Price: $151.00
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Sale: $84.95
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Mahesh Mehendale::Sunil D. Sherlekar
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 2001-06-30
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Reading Level: 236
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Description: A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area--delay--power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area--display--power space. VLSI Synthesis of DSP Kernels presents the following:
+ Six different target implementation styles --
+ Programmable DSP-based implementation;
+ Programmable processors with no dedicated hardware multiplier;
+ Implementation using hardware multiplier(s) and adder(s);
+ Distributed Arithmetic (DA)-based implementation;
+ Residue Number System (RNS)-based implementation; and
+ Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels.
+ For each of the implementation styles, description and analysis of several algorithmic and architectural transformations aimed at one or more of reduced area, higher performance and low power;
+ Automated and semi-automated techniques for applying each of these transformations; and
+ Classification of the transformations based on the properties that they exploit and their encapsulation in a design framework. A methodology that uses the framework to systematically explore the application of these transformations depending on the characteristics of the algorithm and the target implementation style. VLSI Synthesis of DSP Kernels is essential reading for designers of both hardware- and software-based DSP systems, developers of IP modules for DSP applications, EDA tools developers, researchers and managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing.
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Displaying records 51 through 60 of 460
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