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Displaying records 11 through 20 of 460 |
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Price: $50.20
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Sale: $24.90
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Manufacturer: Addison-Wesley
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Number of Items: 1
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Binding: Hardcover
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Author: Lance A. Glasser::Daniel Dobberpuhl
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Publisher: Addison-Wesley
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Dewey Decimal Number: 621.38173
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Publication Date: 1985-07
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Reading Level: 486
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Price:
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Sale: $27.78
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Manufacturer: Wiley
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Number of Items: 1
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Binding: Hardcover
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Author: John P. Uyemura
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Publisher: Wiley
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Dewey Decimal Number: 621.395
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Publication Date: 2001-06-27
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Reading Level: 656
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Description: Presents modern CMOS logic circuits, fabrication, and layout in a cohesive manner that links the material together with the system-level considerations.
* Chapter on Verilog HDL allows for rapid start-up.
* Illustrates the top-down design procedure used in modern VLSI chip design with an emphasis on variations in the HDL, logic, circuits and layout.
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Price: $155.95
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Sale: $24.91
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Manufacturer: CL-Engineering
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Number of Items: 1
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Binding: Hardcover
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Author: John P. Uyemura
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Publisher: CL-Engineering
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 1999-04-16
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Reading Level: 512
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Description: This book provides a new paradigm for teaching digital systems design. It puts forth the view that modern digital logic consists of several interacting areas that combine in a cohesive fashion. This includes traditional subjects such as Boolean algebra, logic formalisms, Karnaugh maps, and other classical topics. However, it goes beyond these subject areas by including VHDL, CMOS, VLSI and RISC architectures to show what the field looks like to a modern logic designer. Modern digital design is no longer practiced as a stand-alone art. The integrated approach used in this book is designed to ensure that graduating engineers are prepared to meet the challenges of the new century.
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Price: $176.00
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Sale: $88.00
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Badih El-Kareh::R.J. Bombard
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 1985-12-31
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Reading Level: 592
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Price: $84.95
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Sale: $57.97
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Thomas Kropf
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.395
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Publication Date: 1999-11-23
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Reading Level: 299
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Description: Hardware verification is a hot topic in circuit and system design due to rising circuit complexity. This advanced textbook presents an almost complete overview of existing techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. It allows the reader to understand the advantages and limitations of each technique. Each chapter contains an introduction and a summary as well as a section for the advanced reader. Thus a broad audience is addressed, from beginners in system design to experts.
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Price: $149.00
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Sale: $107.21
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Lionel Bening::Harry D. Foster
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Publisher: Springer
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Edition: 2nd
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Dewey Decimal Number: 621.395
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Publication Date: 2001-05-01
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Reading Level: 312
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Description: The first edition of Principles of Verifiable RTL Design offered a common sense method for simplifying and unifying assertion specification by creating a set of predefined specification modules that could be instantiated within the designer's RTL. Since the release of the first edition, an entire industry-wide initiative for assertion specification has emerged based on ideas presented in the first edition. This initiative, known as the Open Verification Library Initiative, provides an assertion interface standard that enables the design engineer to capture many interesting properties of the design and precludes the need to introduce new HDL constructs (i.e., extensions to Verilog are not required). Furthermore, this standard enables the design engineer to `specify once,' then target the same RTL assertion specification over multiple verification processes, such as traditional simulation, semi-formal and formal verification tools. The Open Verification Library Initiative is an empowering technology that will benefit design and verification engineers while providing unity to the EDA community (e.g., providers of testbench generation tools, traditional simulators, commercial assertion checking support tools, symbolic simulation, and semi-formal and formal verification tools). The second edition of Principles of Verifiable RTL Design expands the discussion of assertion specification by including a new chapter entitled `Coverage, Events and Assertions'. All assertions exampled are aligned with the Open Verification Library Initiative proposed standard. Furthermore, the second edition provides expanded discussions on the following topics: + start-up verification; + the place for 4-state simulation; + race conditions; + RTL-style-synthesizable RTL (unambiguous mapping to gates); + more `bad stuff'. The goal of the second edition is to keep the topic current. Principles of Verifiable RTL Design, A Functional Coding Style Supporting Verification Processes, Second Edition tells you how you can write Verilog to describe chip designs at the RTL level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
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Price: $37.95
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Sale: $85.00
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Manufacturer: Addison-Wesley Pub (Sd)
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Number of Items: 1
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Binding: Hardcover
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Author: P. B. Denyer
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Publisher: Addison-Wesley Pub (Sd)
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Dewey Decimal Number: 621.38195835
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Publication Date: 1985-10
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Price: $166.00
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Sale: $60.00
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Robert K. Brayton::Gary D. Hachtel::C. McMullen::Alberto L. Sangiovanni-Vincentelli
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.38173
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Publication Date: 1984-08-31
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Reading Level: 212
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Price: $189.00
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Sale: $121.68
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Manufacturer: Springer
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Number of Items: 1
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Binding: Hardcover
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Author: Peter M. Kuhn
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Publisher: Springer
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Edition: 1
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Dewey Decimal Number: 621.388
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Publication Date: 1999-06
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Reading Level: 239
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Description: MPEG-4 is the multimedia standard for combining interactivity, natural and synthetic digital video, audio and computer-graphics. Typical applications are: internet, video conferencing, mobile videophones, multimedia cooperative work, teleteaching and games. With MPEG-4 the next step from block-based video (ISO/IEC MPEG-1, MPEG-2, CCITT H.261, ITU-T H.263) to arbitrarily-shaped visual objects is taken. This significant step demands a new methodology for system analysis and design to meet the considerably higher flexibility of MPEG-4. Motion estimation is a central part of MPEG-1/2/4 and H.261/H.263 video compression standards and has attracted much attention in research and industry, for the following reasons: it is computationally the most demanding algorithm of a video encoder (about 60--80% of the total computation time), it has a high impact on the visual quality of a video encoder, and it is not standardized, thus being open to competition. Algorithms, Complexity Analysis, and VLSI Architectures for MPEG-4 Motion Estimation covers in detail every single step in the design of a MPEG-1/2/4 or H.261/H.263 compliant video encoder: - Fast motion estimation algorithms - Complexity analysis tools - Detailed complexity analysis of a software implementation of MPEG-4 video - Complexity and visual quality analysis of fast motion estimation algorithms within MPEG-4 - Design space on motion estimation VLSI architectures - Detailed VLSI design examples of (1) a high throughput and (2) a low-power MPEG-4 motion estimator. Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation is an important introduction to numerous algorithmic, architectural and system design aspects of the multimedia standard MPEG-4. As such, all researchers, students and practitioners working in image processing, video coding or system and VLSI design will find this book of interest.
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Price: $75.00
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Sale: $18.70
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Manufacturer: Prentice Hall PTR
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Number of Items: 1
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Binding: Paperback
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Author: Wayne Wolf
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Publisher: Prentice Hall PTR
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Edition: 3
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Dewey Decimal Number: 621
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Publication Date: 2002-01-24
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Reading Level: 640
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Description: This is the eBook version of the printed book. If the print book includes a CD-ROM, this content is not included within the eBook version. - The state of the art in VLSI design: layouts, circuits, logic, floorplanning, and architectures
- New techniques for maximizing performance and minimizing power usage
- Extensive new coverage of advanced interconnect models, including copper
- Up-to-the-minute coverage of IP-based design
- Detailed HDL introductions: Verilog and VHDL
The #1 VLSI design guide-now fully updated to reflect the latest advances in SoC design Modern VLSI Design, System-on-Chip Design, Third Edition is a comprehensive, "bottom-up" guide to the entire VLSI design process, focusing on the latest solutions for System-on-Chip (SoC) design. Wayne Wolf reviews every aspect of digital design, from planning and layout to fabrication and packaging, introducing today's most advanced techniques for maximizing performance, minimizing power utilization, and achieving rapid design turnarounds. Coverage includes: - Advanced interconnect models: new techniques for overcoming delay bottlenecks, reducing crosstalk, and modeling copper interconnect
- Advanced low-power design techniques for enhancing reliability and extending battery life in portable consumer electronics
- Testing solutions for every level of abstraction, from circuits to architecture
- Practical IP-based design solutions
- A thorough overview of HDLs, including new introductions to Verilog and VHDL
- Techniques for improving testability, embedded processors, and more
VLSI design for today's high-performance, low-power devices requires broader, deeper skills than ever before. Modern VLSI Design, System-on-Chip Design, Third Edition brings together those skills in a single, comprehensive resource that will be invaluable to every VLSI design engineer and manager.
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Displaying records 11 through 20 of 460
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